Marc Leroux is an experienced engineering professional with a strong background in digital design and ASIC development. Currently serving as a Principal Design Engineer at Silicon Labs since August 2015, Marc previously held the position of Principal Digital Design Engineer at Marvell from July 2008 to August 2015, where responsibilities included leading a team in the design and delivery of digital subsystems for RF cellular transceiver ICs. Prior experience includes roles as Staff ASIC Design Engineer at RFMD, Senior ASIC Design Engineer at Texas Instruments, and Senior ASIC Design Engineer at Parthus Technologies, focusing on various mobile communication technologies. Marc holds a degree from Dundalk Institute of Technology, completed between 1995 and 1998.
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