Ting Yit Wee

Validation Engineer (phy/mac) at Silicon Labs

Ting Yit Wee is a skilled Validation Engineer at Silicon Labs since February 2019, focusing on both PHY/MAC and mixed-signal applications. Responsibilities include implementing and validating wireless communication features for new products, debugging modem issues, and automating validation processes using robotics and computer vision. Ting has also contributed to organizational leadership within the Singapore Armed Forces as an Officer Commanding and has experience in software development obtained through various internships and part-time roles. Educational credentials include a Bachelor of Engineering Science and a Master’s in Technology Management from Nanyang Technological University Singapore, alongside an academic stint at the University of California, Berkeley. Notable achievements include a patent application related to low-cost robotics in validation applications and recognition as the Best New College Graduate at Silicon Labs Annual Technical Symposium.

Links


Org chart


Teams

This person is not in any teams