Ameneh Akbari

Ameneh Akbari has had a diverse range of work experiences in the field of FPGA design and embedded software engineering. In 2003, they began their career as an FPGA Designer at Hooshmand Ertebat Rahgosha (R&D). During their time there, they were responsible for RTL design and the implementation of various IP cores and modules using Verilog and VHDL. Ameneh also gained experience working with NiosII, an embedded processor in Altera FPGAs.

In 2010, Ameneh joined the FPGA Laboratory at Amir Kabir University of Technology as an RTL Designer. Ameneh worked on RTL design projects and stayed in this role until 2011.

Ameneh then transitioned to Cyber-Rain in 2012, where they worked as an Embedded Software and Test Engineer. Ameneh was responsible for developing and testing embedded software for the company's products until 2013.

Since 2013, Ameneh has been working at Silvus Technologies, Inc. as a Principal FPGA Design Engineer. The exact duration of this role is unknown, as the end date is not provided. Overall, Ameneh has demonstrated expertise in FPGA design, RTL design, embedded software engineering, and testing throughout their career.

Ameneh Akbari completed their education at California State University, Northridge, where they pursued a Master's degree in Digital System Design-Electrical and Computer Engineering from 2011 to 2014. Additionally, they also completed a Master's degree in Digital System Design from the same university between 2011 and 2013.