Bharat G.

Bharat G. has over 25 years of experience in the technology industry. Bharat began their career in 1994 as a Design Engineer at Cyrix. In 1995, they moved to Sun Microsystems in the same role. Bharat then joined Cadence Design Systems in 1996 as a Technical Lead. In 1998, they became the Director of IP Reuse at Duet Technologies. In 1999, they took on the role of President & CEO at Sintegra Inc., where they completed 50+ Tape-Outs for customers in 7nm/10nm/14nm/16nm nodes, and established long-term relationships with Tier-1 companies and start-ups. In 2017, they joined Numem as an Advisor. Currently, they are engaged in leading-edge projects in high-performance computing for cloud and edge, AI and ML space.

Bharat G. attended Stony Brook University from 1991 to 1993, where they earned a Master of Science in Electrical and Computer Engineering (MSEE).