Oanh Kim is a seasoned engineer with extensive experience in physical design and circuit engineering. Currently serving as a Sr. Staff Physical Design Engineer at Sintegra Inc. since September 2018, Oanh specializes in Place and Route in 7nm FinFET technology for High Speed DSP PHY blocks. Prior experience includes roles as a Physical Design Engineer at Qualcomm, where Oanh worked on 7nm and 10nm FinFET for High Speed Serdes Digital Blocks, and as a Design Engineer at Analogmacro, focusing on custom analog macro IP development. Oanh also held positions at Broadcom Limited as a Senior Staff IC Design Engineer, Cadence Design Systems as a Principal Design Engineer, NEC Electronics as a Circuit Design Engineer, Cirrus Logic as a Circuit Design Engineer, and ESS Technology as a Circuit Design Engineer. Oanh holds a BS in Electrical Engineering and Computer Sciences from UC Berkeley College of Engineering.
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