Therese Kinney

Therese Kinney is a seasoned engineering professional with extensive experience in design verification and semiconductor technology. With a career spanning over two decades, Therese began as a Component Design Engineer at Intel Corporation, focusing on NOR memory devices before advancing to various roles including Product Development Engineer and SoC Design Engineer/Manager. Therese further honed expertise at Numonyx and Micron Technology as a Design Verification Engineer, responsible for mixed-signal methodologies and fullchip validation for DDR2 devices. Most recently, Therese served as a Sr. Staff Design Verification Engineer at Samsung Semiconductor and currently holds the position of SoC Design Verification Engineer at Intel Corporation, emphasizing verification strategy development and cross-functional collaboration. Academically, Therese holds a Bachelor of Science in Electronics & Communications Engineering from De La Salle University and briefly taught Industrial and Basic Electronics courses.