Arpit Patel is a seasoned engineer specializing in RFIC design validation and characterization, currently serving as a Sr. RFIC Design Validation & Characterization Engineer at pSemi, A Murata Company since March 2022. Prior to this role, Arpit accumulated extensive experience at Hughes, where positions ranged from Sr. MTS Engineer to MTS-2 in the Hardware, RF department from April 2016 to March 2022. Educational credentials include a Master's Degree in Electrical and Electronics Engineering from The University of Texas at Dallas (2013 - 2015) and a Bachelor's Degree in Electronics Engineering from Birla Vishvakarma Mahavidyalaya Engineering College (2009 - 2013).
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