Basil Joy

Basil Joy is an experienced ASIC RTL Design Engineer currently working at SmartSoC Solutions Pvt Ltd since July 2023. Prior to this role, Basil held various positions at L&T Technology Services Limited, including Engineer - VLSI, Associate Engineer, and Internship Trainee from October 2021 to July 2023. Basil also completed a training course at Maven Silicon from April 2021 to October 2021 and worked as a JioFiber Engineer at Quess Corp Limited from August 2019 to April 2021. Earlier in the career, Basil interned at Agappe Diagnostics Ltd in early 2019. Educational qualifications include a Bachelor of Engineering in Electronics and Communication Engineering from CMS College of Engineering and Technology (2016-2019) and a Diploma in Electronics and Communication Engineering from Vetri Vinayaha Polytechnic College (2013-2016). Early education was completed at Santom Public School with SSLC certification under CBSE.