The Engineering & Design Verification team at Softnautics is responsible for ensuring the integrity and functionality of VLSI IP and embedded systems through rigorous testing and validation processes. This team employs a combination of RTL design, verification methodologies, and automated testing techniques to identify and resolve potential issues early in the development phase, guaranteeing that products meet high performance and reliability standards before they reach the market. Collaborating closely with design engineers, they play a critical role in the entire product lifecycle, from initial concept to final deployment.
Abhishek Kumar
Associate Engineer
Abhishek Mandal
Design Verification Engineer
Ajay Vala
Associate Engineer
Ajit Bandhu
Associate DV engineer
Aman Khristi
Associate Engineer
Amit Vadhavana
Associate Engineer
Ankita Mane
Full-stack Developer
Ashray K.
Associate Engineer
Bestha Prakash
VLSI Verification Engineer
bhargav sakhareliya
Associate Engineer
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