Francisco Turcott is an experienced engineering professional specializing in systems validation and debugging, currently serving as a Sysdebug/FA/System Validation Engineer at Solidigm since June 2023. Previously, Francisco held a similar role at Intel Corporation, focusing on PCIe and NVMe specifications and cross-organizational collaboration for product validation. Experience also includes leading automated tests as a Debug Lead Engineer at UST, performing test validations at Jabil, and maintaining test equipment at Sanmina. Francisco has a strong educational background with a Bachelor's degree in Systems Engineering from UTEL Universidad and a Bachelor’s degree in Electrical and Electronics Engineering from Instituto Tecnológico Superior de Zapopan, complemented by an Associate’s degree in Electrical, Electronic and Communications Engineering Technology.
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