Riddhi Kapasi

Riddhi Kapasi is a seasoned Sr FPGA/ASIC Design Verification Engineer at SpaceX, focusing on the development of bug-free ASICs for Starlink internet constellations since December 2021. Prior experience includes a role as a Design Verification Engineer at Amazon from April 2021 to November 2022, and a notable tenure at Intel Corporation from August 2016 to April 2021 as a Staff Design Verification Engineer, having initially joined the company as a Hardware Engineer through its acquisition of another firm. Riddhi Kapasi began a career in verification at Cavium Networks from February 2011 to August 2016, advancing from Senior Verification Engineer to ASIC Design Engineer, where responsibilities included developing comprehensive verification plans and automating design processes. Riddhi Kapasi's career started with an internship at Wavesat in 2010, involving verification tasks and software modelling. Riddhi Kapasi holds a Master's degree in Electronics, VLSI from the University of Illinois Chicago and a Bachelor's degree in Electrical and Electronics Engineering from the University of Mumbai.