Jamal Nassar

Senior Design Verification Engineer at Speedata.io

Jamal Nassar has a strong background in design verification engineering with experience in multiple companies. Jamal currently holds the position of Senior Design Verification Engineer at Speedata.io, starting in August 2021. Previously, they worked at Progineer Technologies as a Sr. Design Verification Team Lead - Intel from March 2018 to August 2021. Prior to that, Jamal worked at ASAL Technologies from December 2007 to February 2018 as a Senior Design Verification Engineer - NUVOTON. During their time at ASAL Technologies, they specialized in verifying embedded controllers and IC solutions for various applications and consumer products using tools such as Cadence's Specman e-Language, NC Verilog simulator, and NOVAS waveform Debugger.

Jamal Nassar started their education in 2001 at Abd Al-Rahem Mahmmod Secondary School, where they completed their high school education in 2002. Following this, they attended Birzeit University from 2002 to 2007, where they pursued a degree in Computer Systems Engineering.

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Speedata.io

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Speedata develops accelerated processor for big data analytics across industries. Speedata's Analytics Processing Unit (APU) was designed solely to optimize datacenter and cloud-based database and analytic workloads, dramatically improving performance by orders of magnitude while reducing costs, power consumption and space.


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Headquarters

Netanya, Israel

Employees

51-200

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