Kalpan M.

Kalpan M. is a Senior Digital Validation Engineer at Synaptics Incorporated, responsible for designing, implementing, and executing validation plans for next-generation video interface products since November 2020. Prior to this role, Kalpan served as a Digital Validation Engineer, acting as the first point of contact for validation issues and developing FPGA systems for high-speed serial interface devices. Earlier experience includes a Graduate Assistant position at NYU Tandon School of Engineering, where Kalpan optimized a Post Quantum Cryptography algorithm for FPGA implementation, and a Project Trainee role at the Physical Research Laboratory, which involved developing a PID controller for a laser diode. Kalpan holds a Master of Science in Computer Engineering from New York University and a Bachelor's Degree in Electrical, Electronics, and Communications Engineering from Nirma University.