Akshay Suresh is an R&D Engineer and Staff Engineer at Synopsys Inc, currently advancing their career in the VLSI industry. Previously, they held the position of VLSI Verification Engineer at Wipro Limited from 2019 to 2025. Akshay earned a Bachelor of Technology in Electronics and Communication Engineering from the Government College of Engineering in Kannur, and they completed a program in VLSI Design and Verification at the Sandeepani School of VLSI Design in 2019. They possess expertise in UVM, OVM, System Verilog, Verilog, and Perl.
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