Ashish Jha is a Sr Engineer in Layout Design at Synopsys, where they currently apply their expertise in VLSI. They completed a Master of Technology in Microelectronics and VLSI Design from the National Institute of Technology, Patna, and a Bachelor of Technology in Electronics and Communications Engineering from Guru Ghasidas University. Previously, Ashish participated in a summer internship focused on VLSI Circuit Design at the Indian Institute of Technology, Guwahati. Passionate about the VLSI industry, they aim to further their career in this dynamic field.
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