Chandan Bisht

Chandan Bisht is an experienced engineer with a focus on memory design and circuit engineering. Since February 2012, Chandan has been serving as a Principal Engineer at Synopsys, leading projects related to differentiated SRAM circuit and compiler design, as well as verification and project planning, while also mentoring onsite and offsite teams. Previously, Chandan worked at Texas Instruments from May 2008 to January 2012 as a Memory Design Engineer, specializing in low power and high performance TCAM and SRAM circuit design. Additional experience includes a position at Montalvo Systems as a Cache Memory Design Engineer and at Virage Logic as a Senior Memory Design Engineer. Chandan holds a B.E. in Electronics & Communications Engineering from Netaji Subhas Institute of Technology, completed in 2003.