Chandra Shekar N

Chandra Shekar N has a solid background in verification engineering and digital design, beginning with a Bachelor of Engineering in Electrical, Electronics, and Communications Engineering from Bangalore Technological Institute (2013-2017) and a Master of Technology in VLSI Design and Embedded Systems from CMR Institute Of Technology (2017-2019). Professional experience includes roles as a Verification Engineer II at Cientra from February 2021 to September 2022 and as a contractor at Qualcomm during the same period, focusing on SoC level verification. Prior to that, Chandra was an ASIC Design Verification Trainee at ChipEdge Technologies Pvt Ltd from September 2019 to January 2020. Currently, Chandra serves as a Digital Design Engineer II at Synopsys Inc since September 2022, concentrating on IP level verification, while demonstrating proficiency in Verilog, System Verilog, and UVM programming concepts.