Daniel Viana has over 14 years of experience in the field of electronic engineering, specializing in FPGA and ASIC design. From September 2007 to February 2018, Daniel worked at PT Inovação as an FPGA Development Engineer, focusing on telecommunications systems and hardware integration. Following this, Daniel joined Synopsys Inc., where roles included ASIC Design Engineer from March 2018 to October 2021 and advancing to Sr II and Sr Staff positions until February 2025. Daniel holds degrees from Universidade de Aveiro, having completed studies from 2001 to 2007.
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