Divya P Ajit is an ASIC Design Engineer currently working as an ASIC Digital Design Staff Engineer at Synopsys Inc since 2024. Previously, Divya held the position of RTL Design Engineer at Tech Mahindra Cerium Pvt Ltd from 2019 to 2024, and worked briefly in Embedded Systems Design at Digital Core Technologies Pvt Ltd in 2018. Divya earned a Bachelor of Technology in Electronics and Communications Engineering from Rajiv Gandhi Institute of Technology, Kottayam in 2019.
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