Hiten Advani is a Senior Director in R&D at Synopsys Inc, where responsibilities include high-speed Serdes analog mixed signal IP development since April 2015. Previously, Hiten held the position of Senior Manager in R&D, focusing on Analog Mixed Signal Serdes design. Hiten's experience at STMicroelectronics spans from March 2009 to March 2015 as Group Manager for Analog PHYs and earlier roles from 1995 to 2007 as Senior Manager for the Analog Group, overseeing the LIPP Crolles2 Alliance. Additional roles at STMicroelectronics include Manager for Embedded FullCustom IP Design, Project Manager for SRAM Product Development, Sr Design Engineer for Memory Cache Design, and Design Engineer for Memory Products Design. Hiten began a career as a Design Engineer at Semiconductor Complex Ltd from 1993 to 1995. Hiten earned a Bachelor of Engineering degree in Electronics & Communications from Delhi College of Engineering between 1989 and 1993.
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