Jagmal Singh is a SoC Design Senior Engineer at Synopsys, with experience as an RTL Design and Logic Synthesis Engineer at Intel Corporation. They previously worked as an Education Professional at Chegg India, where they solved over 300 assignments in Electrical and Electronics. Jagmal has a Bachelor's degree in Electrical Engineering from the Jodhpur Institute of Engineering and Technology and a Master's degree in Control System Design from the National Institute of Technology Kurukshetra. They also completed a project on inverter development for solar pumping systems during their time at IIT Bhubaneswar, focusing on sustainable energy systems.
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