Koppula Naresh

Koppula Naresh is an experienced ASIC Digital Design Staff Engineer at Synopsys Inc since August 2021, previously serving as a Senior Design Engineer. Prior to this role, Koppula worked as a Design Engineer at Eximius Design from January 2018 to July 2021, where responsibilities included IP integration using Magillem IPXACT format for client Samsung. Koppula's career also includes a position as a Design Technical Intern at GE from June 2016 to June 2017, focusing on the design of electrical field wiring diagrams for gas turbine systems. Koppula Naresh holds a Master of Technology (MTech) in Electronics and Instrumentation from NIT Warangal and a Bachelor of Technology (BTech) in Electronics and Instrumentation from Keshav Memorial Institute of Technology Hyderabad.