Maksim Ananev is an FPGA/ASIC Digital Design Engineer specializing in the design of high-performance FPGA-based systems for real-time applications. With experience at companies including Zaslon, Electroavtomatica, and Aviasystems, they have developed DSP for radar systems, aviation display systems, and high-speed video interfaces while utilizing Verilog, VHDL, and SysVerilog. Currently, Maksim holds a position as an ASIC Digital Design Staff Engineer at Synopsys Inc. They earned a Master's degree in Radar Systems Technology from Санкт-Петербургский Государственный Университет Аэрокосмического Приборостроения in 2017. Maksim is open to new opportunities in trading systems, embedded vision, or other areas where FPGAs can be impactful.
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