Manish Patidar is currently a Principal SoC Engineer at Synopsys Inc and has previously served as a Design Consultant and Senior Design Engineer at AMD, leading a team of four members. With five years of experience in physical design, they have successfully contributed to seven tape-outs of ASICs across various technology nodes. Manish is recognized as a quick learner with strong analytical skills and a commitment to teamwork while continually seeking new challenges in chip design. They hold a Master of Technology from the Indian Institute of Technology, Bombay, and have specialized expertise in various physical design tools and methodologies.
This person is not in the org chart
This person is not in any teams
This person is not in any offices