Matteo Dusefante is a Staff R&D Engineer at Synopsys Inc, where they develop advanced CAD software algorithms for the design of nano-scale microchips. They previously held roles as a Visiting Researcher at UC Irvine and an R&D Engineer at OverIT. Matteo completed a PhD in Theoretical Computer Science, focusing on algorithms and data structures, after obtaining a Master's and Bachelor's degree in Computer Science from Università degli Studi di Udine.
This person is not in the org chart
This person is not in any teams
This person is not in any offices