Mike Castellano

Mike Castellano is a seasoned engineering professional currently serving as a Principal SoC Engineer and Physical Design Manager at Synopsys, Inc., where they lead a team focused on advancing customers’ design projects. Previously, Mike worked as a Senior Design Engineer at GEC-Marconi Electronic Systems, Corp., developing RTL code for military communications systems, and as a Hardware Engineer II at Dialogic, Corp., specializing in ASIC design and cost reduction. Mike earned a Bachelor’s degree in Electrical Engineering with a focus on Biomedical Systems from the New Jersey Institute of Technology.