Min-Ching Lin is an experienced R&D Engineering Manager specializing in EDA software development. They led a team at 益華電腦 as a Sr. Product Engineering Manager, focusing on customized solutions for Virtuoso PDK and Pegasus PERC deck, and contributed significantly to TSMC's advanced nodes. Currently, Min-Ching serves as the R&D Manager at 新思科技, where they drive innovation in secondary PG routing for major customers such as Qualcomm and Intel. Min-Ching holds both a B.S. and an M.S. in Electrophysics and Communication Engineering from NCTU, with a GPA of 4.0.
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