Nirav Patel is an experienced engineering professional currently serving as an Analog Design Sr Staff Engineer at Synopsys Inc since June 2023. Prior to this role, Nirav held the position of Principal Engineer at Western Digital from August 2018 to June 2023, and previously worked as a Staff Engineer in the same company. Nirav also gained valuable experience at Synopsys Inc from September 2014 to August 2018 as an A&MS Circuit Design Engineer in both Sr I and II capacities. Earlier experience includes a role as Design Engineer II at AMD from August 2013 to September 2014. Academic credentials include a Master of Technology (M.Tech.) in Electronic Systems from the Indian Institute of Technology, Bombay (2011-2013), and a Bachelor of Technology (B.Tech.) in Electronics and Communications Engineering from Maulana Azad National Institute of Technology (2007-2011).
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