Pawankumar Yendigeri

Pawankumar Yendigeri is a Staff Engineer in ASIC Front-End Design, focusing on RTL, Synthesis, and STA for high-speed interface IPs, particularly MIPI PHYs. They possess expertise in designing constraints for High Speed SerDes using Synopsys tools such as Fusion Compiler and PrimeTime, and are adept with programming languages including Tcl, Shell, and Python. Previously, they worked as a Research Scholar at IIIT Hyderabad, where they focused on hardware design and prototyping for customizable VR head-mounted devices. Pawankumar has also held positions as a Hardware Intern at Jambhekar Automation Solutions and a Research Assistant at IIITH. Currently, they serve as a Senior Design Engineer at Synopsys Inc, contributing to innovative ASIC digital design projects.