Sachin Valsangkar

Sachin Valsangkar is an experienced tech lead at Synopsys Inc since September 2014, specializing in DDRPHY PHY verification, with expertise in DDR3, DDR4, LPD4, and D4-NVDIMM-P DDRPHY technologies. Prior to this role, Sachin worked as a MTS at AMD for a brief period in 2014 focusing on DDR PHY validation. Sachin's career also includes experience as a validation engineer at Intel Corporation within the Graphics Division from November 2011 to June 2014 and as a senior design engineer at AMD from November 2007 to November 2011. Earlier in the career, Sachin served as a design engineer at Freescale Semiconductor from May 2005 to November 2007. Academic qualifications include a Master's Degree in VLSI Design from Nirma University and a Bachelor's Degree in Electronics and Communication from Visvesvaraya Technological University.