Satya Pullela

Satya Pullela is an accomplished professional in the field of electrical and computer engineering, holding a Ph.D. from The University of Texas at Austin and a Master’s degree from the Indian Institute of Science. With extensive experience in leading roles, Satya has served as a Senior Architect and Principal Engineer at Synopsys Inc, Director of R&D for Timing Products at Clear Shape Technologies/Cadence Design Systems, and held multiple positions including Software Architect and Senior Member of Consulting Staff at Cadence Design. Additionally, Satya has contributed as a Principal Engineer at eSilicon Corp and as a Senior Member of Technical Staff at Monterey Design Systems.