Siddhesh Kadam

Siddhesh Kadam is a seasoned ASIC Digital Design Engineer with extensive experience in the hardware design sector, currently serving as a Senior II Engineer at Synopsys Inc since November 2021. With a long-standing tenure at Cisco Systems starting in August 2012, Siddhesh has held roles as both a Senior Hardware Design Engineer and Hardware Design Engineer. Prior experience includes a verification engineering co-op position at AMD in early 2012, where Siddhesh contributed to the development of test plans and regression infrastructure for next-generation CPU/SOC chip projects. Siddhesh's academic background includes a Master of Science in VLSI with an emphasis on Computer Architecture from the University of Southern California, complemented by a Bachelor's of Engineering in Electronics Engineering from Shah & Anchor Kutchhi Engineering College. While studying at USC, Siddhesh served as a mentor and grader for computer systems courses, developing new RTL labs and assisting students with course material.