Tiago Campos is a Senior Staff ASIC Digital Design Engineer at Synopsys, currently contributing to the PCIe Controller R&D team as an RTL design engineer. With a Master’s degree in Electrical and Computer Engineering from the Faculty of Engineering of the University of Porto, where they specialized in microelectronics, Tiago has also served as a teaching assistant for programming courses. Previously, they worked as an ASIC Digital Design Engineer at Axelera AI and held multiple engineering roles at Synopsys, including positions focused on PCIe and ARM Confidential Computing.
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