Tigran Hakobyan is an accomplished engineering professional specializing in analog and mixed-signal integrated circuit design, with extensive experience in both R&D and management roles. Currently serving as an R&D Engineering Architect and Senior Manager of Analog Design at Synopsys Inc since March 2022, Tigran previously held the position of Senior Staff Engineer at Huawei from March 2019 to March 2022. At Synopsys Inc from January 2007 to March 2019, Tigran progressed from R&D Engineer I to Manager, overseeing teams focused on Silicon Debug and Maintenance for various SerDes IPs, including USB technologies. Tigran began the career as a junior circuit designer at LEDA Design from 2003 to 2004. Tigran holds a Master's degree in Microelectronic Circuits and Systems and a Bachelor's degree in the same field from the State Engineering University of Armenia.
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