Victor Burenkov is currently a Sr R&D engineer at Synopsys Inc, where they focus on the development of distributed static timing analysis flows and electronic design automation. Previously, Victor served as a researcher at NTERA, specializing in computer modeling of electro-chromic display circuits, and as an R&D engineer at Belarusian State University, developing software for thermal annealing of doped silicon. They earned a Doctor of Philosophy (Ph.D.) in Microelectronics from University College Cork and a Master's degree in Physics from Belarusian State University.
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