Yugendra Chary

Yugendra Chary is a Senior Analog Layout Designer and Applications Engineer with expertise in advanced semiconductor processes, including Intel 14A and TSMC 2nm technology. Previously, they served as an Application Engineer at CoreEL Technologies and as an Assistant Professor at Sreenidhi Institute of Science and Technology. Most recently, they worked as a Senior Design Engineer at Tessolve, focusing on CMOS analog layout design and physical verification. Currently, Yugendra holds the position of Staff Engineer at Synopsys Inc. They earned a Master of Technology in Digital Systems and Computer Electronics from Sreenidhi Institute of Science and Technology and a Bachelor of Technology in Electronics and Communication Engineering from Jawaharlal Nehru Technological University, Hyderabad, both with First Class Distinction.