Yusuf Selani is an R&D Engineering Manager at Synopsys, where they oversee the development of low power and high-speed memories across various technology nodes. Previously, they served as an intern and an engineer within the same company, gaining valuable experience in memory compiler design implementation and project management at advanced nodes alongside analysis of timing, power, and leakage. Yusuf holds a Master of Technology in VLSI from Nirma University and a Bachelor of Engineering in Electronics & Communication from Chameli Devi Institute of Technology & Management.
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