Hachem Yassine

Hachem Yassine is a Senior SoC Architect at Tenstorrent Inc., specializing in performance modeling and coherent/non-coherent Networks on Chip since February 2023. Previously, Hachem served as a System Architect at Graphcore from May 2019 to February 2023 and held the role of Research Engineer at Toshiba Research Europe Limited, focusing on low-complexity signal processing algorithms and soft decoding of LDPC codes from May 2018 to May 2019. Hachem's earlier experience includes designing and delivering an Engineering course as a Tutor with Oxford Summer Courses, software quality control consulting at Murex, a research internship at Toshiba, and a trainee position at Ericsson. Hachem holds a DPhil in Engineering from the University of Oxford, an MSc in Communication Networks and Signal Processing from the University of Bristol, and a Bachelor of Engineering in Computer and Communication Engineering from Lebanese University.