Impa G is a Senior Design Verification Engineer with a Bachelor of Engineering degree in Electronics and Communication from KNS Institute of Technology, completed in 2018. Impa has accumulated experience as an intern at Maven Silicon and has worked as a Design Verification Engineer at both LeadSoc Technologies Pvt Ltd and Adept Chips Services Pvt Ltd, focusing on clients such as Infineon Technologies and Samsung Semiconductor. Currently, Impa is employed at Tessolve as a Senior Design Verification Engineer. With a strong foundation in hardware description languages and verification methodologies, Impa is passionate about continuous learning and tackling challenging projects in the VLSI domain.
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