M Sreekanth Yadav

M Sreekanth Yadav is a Senior Silicon Validation Engineer 1 at Tessolve since January 2018, specializing in motor driver ASICs and advanced ultrasonic interface controller ASICs, with significant experience in test solutions such as probe testing and functional testing. M Sreekanth has also contributed to training junior and experienced staff on Teradyne ETS800 automatic test equipment (ATE). Previously, as a Silicon Validation Engineer 2 and 1, M Sreekanth was involved in various ASIC conversions and validation processes. An internship project at Electronics Corporation of India Limited (ECIL) focused on developing a sonar-based system for aiding visually impaired individuals. M Sreekanth holds a Bachelor of Technology degree in Electronics and Communications Engineering from Rajiv Gandhi University of Knowledge Technologies, completed in 2018, and a Matriculation degree from Kendriya Vidyalaya in 2012.