Praveenkumar Hallur

Praveenkumar Hallur is a seasoned engineering professional with extensive experience in ASIC, IP, and SoC verification, currently serving as a Senior Design Lead Engineer at Tessolve since February 2020, focusing on automotive processor subsystem verification for a prestigious client. Prior to this role, Praveenkumar held various positions, including Senior Design Lead and Technical Team Manager at Test and Verification Solutions, managing teams for clients such as Intel and Ericsson. Previous experiences also include roles at ADV Technologies, L&T Infotech Limited, Synopsys, and Wipro Technologies, where expertise in verification methodologies such as UVM, OVM, and SV was developed. Praveenkumar holds a Master of Technology degree in VLSI and Embedded Systems from Visvesvaraya Technological University.