Neeraj Shrivastava is an experienced Analog Design Lead at Texas Instruments since November 2013, specializing in RF sampling ADCs. Previously, Neeraj co-founded Sahyogee Tech Solutions, focusing on analog and mixed-signal design training and consultancy from July 2011 to October 2013. Earlier experience at Texas Instruments includes serving as an IC Design Lead from July 2004 to June 2011, where Neeraj led the project for ADS5263, a notable 16-bit quad-channel ADC, and was responsible for designing experiments for complex silicon debugging. Neeraj holds two patents in pipeline ADC design and has presented three papers on high-speed ADC designs at TI's HPA symposium. Educational credentials include an M.Tech. in Microelectronics from the Indian Institute of Technology, Bombay, and a Bachelor of Technology in Electrical Engineering from Govind Ballabh Pant Krishi Evam Praudyogik Vishwavidyalaya.
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