Eric Liu

Eric Liu is a seasoned professional in semiconductor process engineering with extensive experience in advanced patterning and etch technologies. Currently serving as a Manager in Process Engineering at Tokyo Electron US since 2015, Eric leads a team focused on research and development for sub-10nm FinFET/GAA structures using multi-patterning and Extreme Ultraviolet Lithography (EUV) techniques. Prior experience includes managing logic patterning processes at 台積電 from 2009 to 2015, where Eric was instrumental in developing 7nm/10nm/16nm FinFET technologies. Eric's early career included co-op roles at GE, contributing to solar module design and material analysis. Eric holds a PhD in Nanotechnology from SUNY Polytechnic Institute, a Master of Engineering in Materials Sciences and Engineering from Cornell University, and a Bachelor of Science in Material Sciences and Engineering from Penn State University.