Ajesh Prabhu is a seasoned hardware engineer with extensive experience in FPGA development and hardware design across various prominent companies. Currently at Tower Research Capital as a Hardware Engineer since April 2019, Ajesh has previously held roles including FPGA R&D Engineer at Millennium Management, SVP Hardware Development at MANA Partners LLC, and FPGA Developer at Instinet Incorporated, focusing on latency-sensitive trading technologies. Ajesh's earlier experience at InterDigital Communications involved hardware design for 3G/4G modem ASIC verification, while roles at Lucent Technologies and Deccanet Designs Ltd contributed to expertise in ATM switch modules and telecommunications. Ajesh holds a Master's degree in Electrical Engineering from the Illinois Institute of Technology and a Bachelor's degree in Electronics and Communications from Manipal Institute of Technology.
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