Daniel Lomeli

Daniel Lomeli is an experienced ASIC Design Engineer currently employed at Trilinear Technologies since February 2023. Prior to this role, Daniel held various positions, including Lead Tech FPGA at Eridan from March 2020 to February 2023, where responsibilities included job description generation, candidate interviewing, and mentoring junior engineers. At Microsoft, Daniel worked as an RTL Designer, collaborating with analog teams and contributing to the development of DSP algorithms and UVM verified RTL blocks. Additional experience includes positions as a Senior Engineer at Signal Laboratories, a Senior Electrical Engineer at Orbital ATK, a Firmware Engineer II at Raytheon, an Electrical Engineer I at Northrop Grumman, and a Senior Airman in the United States Air Force. Throughout these roles, Daniel has demonstrated expertise in FPGA implementations, digital communications, and signal processing.