Thirumalaivel Maruthanayagam is an experienced engineer with a strong background in electronic interlocking systems and maintenance engineering. Currently serving as Design Lead at TVM Signalling and Transportation Systems since September 2009, responsibilities include designing control and selection tables, application logic, interface circuits, system energizing, troubleshooting, and testing and commissioning of Ansaldo MICROLOK II and Kyosan K5BMC model systems for Indian Railways. Previously, as a Maintenance Engineer at SVP Smart Services from June 2008 to August 2009, Thirumalaivel worked on the TPWS South project, focusing on the maintenance of track side and on-board systems, failure analysis, and program loading. Academic credentials include a diploma from SCAD Polytechnic College (2004-2007) and earlier education at P.L.W.A Higher Secondary School (1994-2004).
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