Somaya Rao

Product Validation Engineer III at UST

Somaya Rao is a Product Validation Engineer III at UST, with experience in model optimization using Intel OpenVINO, DirectML, and IPEX for Panther Lake, Lunar Lake, and Meteor Lake platforms since December 2021. Key accomplishments include converting Hugging Face models to IR format for Intel GPU execution and integrating several advanced models such as LLaMA 2, LLaMA 3, ChatGLM, Mistral, Qwen, and Stable Diffusion on Intel hardware. Prior to UST, Somaya held the position of Associate Software Engineer at Mphasis from October 2018 to May 2021, where responsibilities included spearheading Intelligent Provisioning for server setups and testing and deploying Service Packs for ProLiant. Educational qualifications include a Bachelor of Technology in Computer Science from Mody Institute of Technology and Science, completed in 2018.

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