Jerry Joe Thomas

Senior Design Verification Engineer at Ventana Micro Systems

Jerry Joe Thomas is currently a Verification Intern at Ventana Micro Systems as of June 2023, focusing on verifying digital logic correctness through test writing and debugging simulations. Previously, Jerry worked as a CPU Verification Engineer at Valtrix Systems from December 2019 to July 2022, contributing to the development of the STING software for RISC-V CPU/SoC verification. Jerry's experience also includes a role as a Test Engineer at Broadcom Inc. between June 2018 and November 2019, where performance testing for BRCM chips was conducted. Additionally, Jerry served as the Placement Cell Coordinator at Model Engineering College, facilitating campus recruitment drives, and completed an internship at WiSilica in mid-2017, working on CSR and Telink chips. Educationally, Jerry is pursuing a Master's degree in Computer Engineering with a specialization in ASIC Design and Verification at North Carolina State University, and holds a Bachelor's degree in Electronics and Communication Engineering from Model Engineering College.

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