Vaibhav Dhotre

Vaibhav Dhotre has worked in the engineering industry since 2010. Their first role was as a Verification Engineer at Veloce Technologies, where they were responsible for developing SystemVerilog-based constrained random test generators and Architectural Verification test plans. In 2010, they also took on the role of Research Assistant at the University of Southern California, where they were part of the design team for an improved Out-of-Order Processor based on Tomasulo Algorithm. In 2012, they joined AppliedMicro as a Staff Design Engineer, where they had an in-depth understanding of the ARM architecture, DDR3/4 JEDEC protocol, DFI 4.0 protocol, APB, and AMBA bus protocols, as well as memory sub-system design and CPU Design. In 2017, Vaibhav began working as a Principal Design Engineer at Ampere. Most recently, they have been working as an Engineer at Ventana Micro Systems since 2019.

Vaibhav Dhotre received their Bachelor's in Engineering from the University of Mumbai in 2008, majoring in Electronics. Vaibhav then went on to pursue their Master's in Electrical Engineering from the University of Southern California from 2008 to 2010.