Murilo Lacerda Yoshida

Murilo Lacerda Yoshida has a diverse work experience spanning various roles and industries. Murilo started their career in 2004 as an Engenheiro de projeto de sistema trainee at AGX Tecnologia, where they worked until 2005. From 2005 to 2007, Murilo worked as an Application Engineer at IWS do Brasil, specializing in industrial automation and developing applications for the petrochemical industry.

In 2007, they joined FASP as a Professor, teaching courses until 2008. During the same year, Murilo also worked at VoxAge TeleInformatica as a System Analyst, developing applications for the Telecom industry.

In 2008, they joined FIAP and FIT as a Professor, teaching courses until 2009. Following this, from 2009 to 2011, Murilo worked as a Systems Analyst at PhiSystems.

In 2011, they joined VistaJet as a Development Manager, overseeing various projects until 2015. Afterward, they transitioned to the role of Senior Solutions Architect, contributing to the company until 2018. In 2019, Murilo assumed the position of VP of Engineering at VistaJet.

Overall, Murilo Lacerda Yoshida has demonstrated expertise in engineering, analysis, teaching, and leadership roles throughout their career.

Murilo Lacerda Yoshida completed their Bachelor's degree in Computer Engineering from UFSCar - Alumni, from the year 1998 to 2004. Murilo then pursued a Master's degree in Artificial Intelligence, Data mining, and Bayesian Networks from the same institution, UFSCar - Alumni, for the period of 2005 to 2006.